1. Field of the Invention
The present invention relates to metrology in the field of manufacturing integrated circuits, lithographic masks used in integrated circuit design and other complex devices having small features. More particularly, the present invention relates to a process for developing recipes for metrology for such products.
2. Description of Related Art
Integrated circuits and other complex devices having small features are manufactured using lithographic processes. As the size of the features in integrated circuits and other devices manufactured using such processes shrinks, control over the dimensions of the small features becomes more critical. Because of variations in coherence, intensity and focus of the radiation utilized, and variations in the materials utilized for pattern definition, like photoresist, and in the composition of the materials (e.g. polysilicon, dielectrics and metals) used for structures on the devices, the lithographic processes require continual monitoring and measurement to ensure that the dimensions of the patterns being formed fall within acceptable ranges.
Measurements of dimensions of such features is generally referred to as metrology in the lithographic arts. Typically, metrology in the semiconductor industry relies on top-down scanning electron microscopes SEMs for metrology of critical dimensions for sub-micron features. Optical microscopes are utilized, as well. A wide variety of tools is also available for metrology. A discussion of background for metrology in the integrated circuit arts is provided in Ausschnit et al., U.S. Pat. No. 6,130,750. See also, Toprac et al., U.S. Pat. No. 6,346,426.
For efficient, automated metrology, it is important to develop a metrology recipe which identifies features to be measured, and provides parameters to the metrology tool necessary to find the feature, set up the tool and measure the feature. The set of features to be measured must be sufficient in number and in distribution on the device, to provide reliable information about the manufacturing process. However, in prior art approaches, the set of features to be measured is manually selected, and the metrology tools are manually set up by skilled engineers, using painstaking study of the layout. Therefore, the set of features to be measured must be efficiently determined and limited to a number that can be effectively achieved without undue expense.
To set up a recipe for many wafer metrology tools, a manual first pass is necessary to handpick the features the user wants to measure, and set the locations on the features for the measurements. For high precision tools, such as SEMs, it is also necessary capture an image of the feature to be measured at each measurement location within the device. The recipe is used by the tool to scan to each measurement location on the device being manufactured, and using an image recognition process based on the recipe image, to align the tool for proper measurement of the real-time image. The manual process of finding locations and taking the images can be very time-consuming, requires skilled engineers, and limits the number of measurement locations that can be practically set up.
The problem of selecting which features to inspect on a device, further complicates the metrology set up process, for devices having millions of features defined by lithography. It has been proposed, as set out in Glasser, et al., International Patent Application Publication No. WO 00/36525, to provide design databases for reticles in which critical features of the reticles are flagged for enhanced inspection of the reticles and of integrated circuit layers formed using the reticles, and for enhanced attention during manufacture. Also, simulation of a target pattern to be formed on integrated circuits for the flagged features is described, for use as base line images in the enhanced defect analysis.
It is desirable therefore to provide techniques for establishing metrology recipes, and for accomplishing metrology for manufacturing lines using lithographic techniques, that are more effective and less expensive than the techniques of the prior art.